This section is intended to provide information relevant to understanding various technologies described herein. As the section's title implies, this is a discussion of related art that should in no way imply that it is prior art. Generally, related art may or may not be considered prior art. It should therefore be understood that any statement in this section should be read in this light, and not as any admission of prior art.
Modern ultra-low power (ULP) circuits typically employ sub-threshold or near-threshold design techniques but also require higher voltage domains for RF, I/O, and other circuits. As a result, wide-range level conversion is needed to interface between various blocks in ULP circuits. Generally, conventional level converter (LC) designs that operate at sub-threshold or near-threshold voltage is difficult to implement. As such, conventional LC designs suffer from severe contention between strong pull-up devices and weak pull-down devices, which unfortunately leads to high sensitivity to delay and power.